1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having a plurality of output modes with variable bus widths.
2. Description of the Related Art
There was a semiconductor integrated circuit in which the output bit width can be changed in accordance with a device connected to the outside of the semiconductor integrated circuit. For example, in a semiconductor integrated circuit having a 16-bit bus mode and an 8-bit bus mode, sixteen outgoing I/O portions are provided so that the sixteen outgoing I/O portions output respective bits of 16-bit data in the 16-bit bus mode whereas eight I/O portions corresponding to less significant 8 bits are selected from the sixteen outgoing I/O portions in the 8-bit bus mode and used for outputting data while the output for more significant 8 bits is fixed or the input for more significant 8 bits is pulled down or up.
FIG. 7 is a diagram showing the configuration of I/O portions of a semiconductor integrated circuit according to the background art. The semiconductor integrated circuit according to the background art includes a set of AND circuits 701, a set of output buffers 702, and a set of outgoing I/O portions 703 (16 bits of IO0 to IO15). These constituent members 701 to 703 are separated into a group corresponding to more significant bits (IO8 to IO15) and a group corresponding to less significant bits (IO0 to IO7).
OUT0 to OUT15 are output signals generated by the internal operation of the semiconductor integrated circuit and outputted to the outside. MODE16B is an output mode switching signal. When MODE16B is high (H) in level, a 16-bit bus mode is selected. When MODE16B is low (L) in level, an 8-bit bus mode is selected. Specifically, when MODE16B is L, the output of the set of AND circuits is fixed to L to thereby select an 8-bit bus mode.
OE8H is an output control signal for controlling the set of output buffers 702 for the more significant bits. When OE8H is H, IO8 to IO15 are outputted normally. When OE8H is L, a half of the set of output buffers 702 corresponding to IO8 to IO15 become a high impedance state (HiZ). OE8L is an output control signal controlling the set of output buffers 702 for the less significant bits. When OE8L is H, IO0 to IO7 are outputted normally. When OE8L is L, a half of the set of output buffers 702 corresponding to IO0 to IO7 become HiZ.
In the 16-bit bus mode where MODE16B is H, OUT0 to OUT15 are outputted to IO0 to IO15 directly if OE8H is H and OE8L is H. In the 8-bit bus mode where MODE16B is L, the output for IO8 to IO15 is fixed to L if OE8H is H, but IO8 to IO15 are pulled down or up to pull-down or pull-up resistors if OE8H is L. When OE8L is H, OUT0 to OUT7 are outputted to IO0 to IO7 directly.
In this configuration, the quantity of data allowed to be outputted at once in the 8-bit output mode is a half of the quantity of data in the 16-bit output mode. For this reason, an output speed twice as high as the output speed in the 16-bit output mode is required in the 8-bit output mode for obtaining the same transfer rate as that in the 16-bit output mode. When such a high-speed operation is performed, increase in output current capacity is required.
As a technique for changing external output current capacity of a semiconductor integrated circuit, there has been heretofore proposed a semiconductor device having such a circuit configuration that transistor drive capacity can be changed on the basis of an external signal in order to improve the margin for test reading (e.g. see Japanese Patent Laid-Open No. 79056/1991).
As described above, if a constant transfer rate is required in data outputting in a semiconductor integrated circuit having a plurality of output modes with variable bus widths such as a 16-bit output mode and an 8-bit output mode, an output speed twice as high as that in the 16-bit output mode is required in the 8-bit output mode. There is a possibility that no mode but the 8-bit mode can be used for the structural reason of the external device. When such a high-speed operation is performed, the semiconductor integrated circuit cannot be operated normally if output current capacity is low.
The background-art technique for changing transistor drive capacity in the external output of the semiconductor integrated circuit is a technique by which transistor drive capacity can be lowered in order to improve the margin for test reading. The idea of changing external output current capacity in accordance with necessity is effective. This technique however has a disadvantage in that the external output circuit becomes complex because the transistor drive capacity is changed.